This invention relates to a printed circuit board (PCB) and more particularly to a PCB having minimized stresses between said board and leadless chip carriers (LCC) mounted thereon, such stresses being primarily the result of different thermal coefficients of expansion of contiguous materials of the PCB and the LCC.
Although printed circuit boards are well-known in the electronics industry, the evolution of LSI (large scale integrated) and VLSI (very large scale integrated) circuits have required new packaging techniques. One of these techniques includes the use of leadless chip carriers for mounting on some type of printed circuit board. One of the common problems with the use of leadless chip carriers is the thermal mismatch between the LCC and a printed circuit board. The different thermal coefficients of expansion (TCE) of an LCC and a PCB cause fatigue cracking of the interfacing solder joints particularly over the military applications temperature range of -55.degree. C. to .degree.125.degree. C.
There have been various approaches in attempting to develop a closer thermal match between an LCC and a PCB. One known approach has been to introduce compliancy into electrical connection points by building up the PCB pads into raised copper pedestals or bumps to allow the joints to yield a little during thermal cycling. Another approach in the industry for solving the thermal mismatch problem is to mount leadless chip carriers on an intermediate ceramic substrate and then mount that substrate to a printed circuit motherboard. Still other approaches have used sockets and clips to solve the thermal mismatch problem. See "Chip Carriers: Coming Force in Packaging", Electronic Packaging and Production Magazine, March 1981, pgs. 64-80.
Another prior art approach provides a PCB metal core substrate having the best characteristics of both PCB and ceramics such as the electrical characteristics of PCB and the high interconnection density, low numbers of layers and good heat dissipating ability of ceramic thick film multilayers. This approach utilizes high density discrete wiring as the interconnection technique, however, thermal mismatch problems have not been eliminated with this approach. See "Use of Metal Core Substrates for Leadless Chip Carrier Interconnection", Electronic Packaging and Production Magazine, March 1981, pgs. 98-104.
In U.S. Pat. No. 4,318,954, a PCB substrate is disclosed which comprises a conventional PCB (such as a glass fiber reinforced epoxy PCB) secured to a fiber reinforced plastic support having a thermal coefficient of expansion which closely approaches zero. By securing the conventional PCB to such a support member through an adhesive, the PCB has an apparent coefficient of thermal expansion at its surface approximating that of a ceramic chip carrier while retaining its normal coefficient of thermal expansion in its thickness direction. The support member is fabricated from graphite filament reinforced epoxy resins which has an extremely low thermal coefficient of expansion. When a ceramic chip carrier is connected to such a PCB composite laminate, the resulting solder joints do not experience significant stresses when exposed to thermal variations although such a PCB may offer certain disadvantages in some applications.